Author of the publication

Enhancing Hardware Security with Emerging Transistor Technologies.

, , , , , and . ACM Great Lakes Symposium on VLSI, page 305-310. ACM, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Hardware Trojan Detection Using Path Delay Fingerprint., and . HOST, page 51-57. IEEE Computer Society, (2008)Security Policy Enforcement in Modern SoC Designs., and . ICCAD, page 345-350. IEEE, (2015)Reconciling the IC test and security dichotomy., , , , , , and . ETS, page 1-6. IEEE Computer Society, (2013)Hardware Trojans in Wireless Cryptographic ICs., and . IEEE Design & Test of Computers, 27 (1): 26-35 (2010)Security validation in IoT space., , , and . VTS, page 1. IEEE Computer Society, (2016)The Old Frontier of Reverse Engineering: Netlist Partitioning., , , , , and . J. Hardware and Systems Security, 2 (3): 201-213 (2018)MT-Spike: A Multilayer Time-based Spiking Neuromorphic Architecture with Temporal Error Backpropagation., , , , , and . CoRR, (2018)PT-spike: A precise-time-dependent single spike neuromorphic architecture with efficient supervised learning., , , , and . ASP-DAC, page 568-573. IEEE, (2018)Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures., , , and . ACM Great Lakes Symposium on VLSI, page 147-152. ACM, (2018)Strategy without tactics: policy-agnostic hardware-enhanced control-flow integrity., , , , , and . DAC, page 163:1-163:6. ACM, (2016)