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AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture.

, , , , , and . HPCA, page 287-298. IEEE Computer Society, (2012)

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A New Multiple-Round DOR Routing for 2D Network-on-Chip Meshes., , , and . PRDC, page 276-281. IEEE Computer Society, (2009)Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores., , , and . ASP-DAC, page 394-399. IEEE, (2014)TSV Minimization for Circuit - Partitioned 3D SoC Test Wrapper Design., , , and . J. Comput. Sci. Technol., 28 (1): 119-128 (2013)A General-Purpose Many-Accelerator Architecture Based on Dataflow Graph Clustering of Applications., , , and . J. Comput. Sci. Technol., 29 (2): 239-246 (2014)Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling., , , , and . Journal of Systems Architecture - Embedded Systems Design, 56 (10): 534-542 (2010)Fast Packet Classification using Group Bit Vector., , , and . GLOBECOM, IEEE, (2006)On optimizing system energy of multi-core SoCs based on dynamically reconfigurable voltage-frequency island., , , and . VLSI-DAT, page 1-4. IEEE, (2015)A New Post-Silicon Debug Approach Based on Suspect Window., , and . VTS, page 85-90. IEEE Computer Society, (2009)Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCs., , , and . DATE, page 933-936. IEEE, (2010)On predicting NBTI-induced circuit aging by isolating leakage change., , , , and . ISQED, page 46-52. IEEE, (2013)