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Temporal Tracing of On-Chip Signals using Timeprints., , , , , and . DAC, page 186. ACM, (2019)Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study., , , and . DAC, page 188. ACM, (2019)Data flow testing for virtual prototypes., , , , , and . DATE, page 380-385. IEEE, (2017)On the application of formal fault localization to automated RTL-to-TLM fault correspondence analysis for fast and accurate VP-based error effect simulation - a case study., , , and . FDL, page 1-8. IEEE, (2016)Funktionale Verifikation eingebetteter Systeme: Techniken und Werkzeuge auf Systemebene.. Ausgezeichnete Informatikdissertationen, volume D-16 of LNI, GI, (2015)Learning Online Smooth Predictors for Realtime Camera Planning Using Recurrent Decision Trees., , , , and . CVPR, page 4688-4696. IEEE Computer Society, (2016)Data Flow Testing for SystemC-AMS Timed Data Flow Models., , , and . DATE, page 366-371. IEEE, (2019)Towards fully automated TLM-to-RTL property refinement., , , and . DATE, page 1508-1511. IEEE, (2018)Computations of the symmetric cosine transform using Forsythe and Clenshaw's recurrence formulae., , and . Electronic Imaging: Image and Video Communications and Processing, volume 5685 of SPIE Proceedings, SPIE, (2005)Towards Automated Refinement of TLM Properties to RTL., , , and . MBMV, Universität Tübingen, (2018)