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Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale System., , , , , , , , , and 15 other author(s). CoRR, (2017)The Operating System of the Neuromorphic BrainScaleS-1 System., , , , , , , , , and 12 other author(s). CoRR, (2020)Pattern representation and recognition with accelerated analog neuromorphic systems., , , , , , , , , and 26 other author(s). ISCAS, page 1-4. IEEE, (2017)Generative models on accelerated neuromorphic hardware., , , , , , , , , and 14 other author(s). CoRR, (2018)Full Wafer Redistribution and Wafer Embedding as Key Technologies for a Multi-Scale Neuromorphic Hardware Cluster., , , , , , , and . CoRR, (2018)A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems., , , , , , , , , and 24 other author(s). Biol. Cybern., 104 (4-5): 263-296 (2011)Pattern representation and recognition with accelerated analog neuromorphic systems., , , , , , , , , and 25 other author(s). CoRR, (2017)Neuromorphic hardware in the loop: Training a deep spiking network on the BrainScaleS wafer-scale system., , , , , , , , , and 19 other author(s). IJCNN, page 2227-2234. IEEE, (2017)