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Disambiguation of "Centurelli, Francesco"

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A SiGe HBT 6th-Order 10 GHz Inductor-Less Anti-Aliasing Low-Pass Filter for High-Speed ATI Digitizers.

, , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (1): 100-113 (2022)

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Francesco Virgili University of Stuttgart

Francesco Salerno University of Stuttgart

Francesco Cucinotta University of Stuttgart

 

Other publications of authors with the same name

A wideband amplifier topology based on positive capacitive feedback., , and . Microelectronics Journal, 45 (1): 50-58 (2014)An MDAC architecture with low sensitivity to finite opamp gain., , and . ECCTD, page 568-571. IEEE, (2011)A Topology of Fully Differential Class-AB Symmetrical OTA With Improved CMRR., , , , and . IEEE Trans. on Circuits and Systems, 65-II (11): 1504-1508 (2018)A Simple Technique for Fast Digital Background Calibration of A/D Converters., , and . EURASIP J. Adv. Sig. Proc., (2008)Behavioral Modeling for Calibration of Pipeline Analog-To-Digital Converters., , and . IEEE Trans. on Circuits and Systems, 57-I (6): 1255-1264 (2010)High-gain, high-CMRR class AB operational transconductance amplifier based on the flipped voltage follower., , and . I. J. Circuit Theory and Applications, 47 (4): 499-512 (2019)Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies., , , , and . IEEE Trans. on Circuits and Systems, 56-II (6): 459-463 (2009)A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier., , , and . MIXDES, page 143-146. IEEE, (2016)A 10-Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability., , , , , , , and . IEEE Trans. VLSI Syst., 13 (2): 191-200 (2005)Current output stage with improved CMRR., , and . ICECS, page 543-546. IEEE, (2003)