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Processing and Scheduling Components in an Innovative Network Processor Architecture., , , , , , , and . VLSI Design, page 195-201. IEEE Computer Society, (2003)Prototyping Efficient Interprocessor Communication Mechanisms., , , , , , , , and . ICSAMOS, page 26-33. IEEE, (2007)Design space exploration for fair resource-allocated NoC architectures., , , and . ICSAMOS, page 141-148. IEEE, (2014)A Reconfigurable Perfect-Hashing Scheme for Packet Inspection., , , and . FPL, page 644-647. IEEE, (2005)Hashing + Memory = Low Cost, Exact Pattern Matching., and . FPL, page 39-44. IEEE, (2005)Variable-Length Hashing for Exact Pattern Matching., and . FPL, page 1-6. IEEE, (2006)A Systematic Evaluation of Emerging Mesh-like CMP NoCs., , , , , , and . ANCS, page 159-170. IEEE Computer Society, (2015)DeSyRe: On-demand system reliability., , , , , , , , , and 8 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-C): 981-1001 (2013)On the Importance of Header Classification in HW/SW Network Intrusion Detection Systems., , and . Panhellenic Conference on Informatics, volume 3746 of Lecture Notes in Computer Science, page 661-671. Springer, (2005)A generic high throughput architecture for stream processing., , , , and . FPL, page 1-5. IEEE, (2017)