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OAP: an obstruction-aware cache management policy for STT-RAM last-level caches.

, , and . DATE, page 847-852. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement., , , , , and . DAC, page 554-559. ACM, (2008)OAP: an obstruction-aware cache management policy for STT-RAM last-level caches., , and . DATE, page 847-852. EDA Consortium San Jose, CA, USA / ACM DL, (2013)An energy-efficient 3D CMP design with fine-grained voltage scaling., , and . DATE, page 539-542. IEEE, (2011)Building and Optimizing MRAM-Based Commodity Memories., , and . TACO, 11 (4): 36:1-36:22 (2014)Endurance-aware cache line management for non-volatile caches., , , and . TACO, 11 (1): 4:1-4:25 (2014)Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support., , , and . SC, page 1-11. IEEE, (2010)Architectural benefits and design challenges for three-dimensional integrated circuits., , , and . APCCAS, page 540-543. IEEE, (2010)System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs)., and . ASP-DAC, page 234-241. IEEE, (2009)Three-dimensional Integrated Circuits: Design, EDA, and Architecture., , , , and . Foundations and Trends in Electronic Design Automation, 5 (1-2): 1-151 (2011)Energy-efficient multi-level cell phase-change memory system with data encoding., , , , and . ICCD, page 175-182. IEEE Computer Society, (2011)