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Disambiguation of "Mak, T. M."

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Soft Error Resilient System Design through Error Correction.

, , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 143-156. Springer, (2006)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sokol Makolli University of Stuttgart

Nastasia Makki University of Stuttgart

T. Ertl

T. Vietor

T. Maier

 

Other publications of authors with the same name

Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint., , , and . IEEE Trans. VLSI Syst., 20 (9): 1621-1633 (2012)Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?., , and . IEEE Trans. Computers, 56 (3): 415-428 (2007)Trends in manufacturing test methods and their implications., , and . ITC, page 679-687. IEEE Computer Society, (2004)Elimination of Traditional Functional Testing of Interface Timings at Intel., , and . ITC, page 1014-1022. IEEE Computer Society, (2003)Crosstalk test generation on pseudo industrial circuits: a case study., , , and . ITC, page 548-557. IEEE Computer Society, (2001)Should Logic SER be Solved at the Circuit Level?, and . IOLTS, page 199. IEEE Computer Society, (2006)Embedded Tutorial: Test Consideration for Nanometer Scale CMOS Circuits., , and . VTS, page 313-318. IEEE Computer Society, (2003)A Comprehensive BIST Solution for Polar Transceivers Using On-Chip Resources., , , , , and . ACM Trans. Design Autom. Electr. Syst., 23 (1): 2:1-2:21 (2017)Novel compensation scheme for local clocks of high performance microprocessors., , , and . ITC, page 1-9. IEEE Computer Society, (2007)Design for Resilience to Soft Errors and Variations., , , , , and . IOLTS, page 23-28. IEEE Computer Society, (2007)