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Disambiguation of "Rao, Rahul M."

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Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength.

, , , and . SoCC, page 147-150. IEEE, (2005)

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Rahul Barthwal University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

 

Other publications of authors with the same name

IBM POWER8 circuit design and energy optimization., , , , , , , , , and 13 other author(s). IBM Journal of Research and Development, (2015)Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis., , , , , , , , and . ICCAD, page 458-465. IEEE, (2013)IBM POWER9 circuit design and energy optimization for 14-nm technology., , , , and . IBM Journal of Research and Development, 62 (4/5): 4 (2018)A High Performance Gated Voltage Level Translator with Integrated Multiplexer., and . VLSI Design, page 358-361. IEEE Computer Society, (2018)A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits., , , and . ICCAD, page 689-692. IEEE Computer Society / ACM, (2003)Efficient techniques for gate leakage estimation., , , and . ISLPED, page 100-103. ACM, (2003)Parametric Yield Analysis and Optimization in Leakage Dominated Technologies., , , and . IEEE Trans. VLSI Syst., 15 (6): 613-623 (2007)Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise., , , , and . IEEE Trans. VLSI Syst., 18 (1): 166-170 (2010)Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength., , , and . SoCC, page 147-150. IEEE, (2005)On-Chip Process Variation Detection and Compensation Using Delay and Slew-Rate Monitoring Circuits., , , and . ISQED, page 815-820. IEEE Computer Society, (2008)