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Régulation du flot d'instructions pour des processeurs orientés temps réel., and . Technique et Science Informatiques, 24 (8): 963-989 (2005)A Case for Static Branch Prediction in Real-Time Systems., , and . RTCSA, page 33-38. IEEE Computer Society, (2005)Predictable bus arbitration schemes for heterogeneous time-critical workloads running on multicore processors., , and . ETFA, page 1-4. IEEE, (2011)Temporal Isolation of Hard Real-Time Applications on Many-Core Processors., , , , , and . RTAS, page 37-47. IEEE Computer Society, (2016)Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore., , , , , , , , , and 22 other author(s). ACM Trans. Embedded Comput. Syst., 15 (3): 53 (2016)Using the abstract interpretation technique for static pointer analysis., , , and . SIGARCH Comput. Archit. News, 27 (1): 47-50 (1999)Optimisations du chargement des instructions., , , and . Technique et Science Informatiques, 22 (6): 689-711 (2003)Towards Designing WCET-Predictable Processors., and . WCET, MDH-MRTC-116/2003-1-SE, page 87-90. Department of Computer Science and Engineering, Mälardalen University, Box 883, 721 23 Västerås, Sweden, (2003)Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation., , , and . RTCSA, page 161-166. IEEE Computer Society, (2008)Inter-task WCET computation for a-way instruction caches., , , and . SIES, page 169-176. IEEE, (2008)