PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Do, Minh Quang"

Author of the publication

copydeleteadd this publication to your clipboard
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration.

, , , and . ISQED, page 557-563. IEEE Computer Society, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Do Yeon Kim University of Stuttgart

F. Dörr

Dr. Karim Douch University of Stuttgart

Kathrin Doth University of Stuttgart

Bianca Dößelmann University of Stuttgart

 

Other publications of authors with the same name

Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration., , , and . ISQED, page 557-563. IEEE Computer Society, (2006)Table-Based Total Power Consumption Estimation of Memory Arrays for Architects., , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 869-878. Springer, (2004)On-Line Cost-Aware Workflow Allocation in Heterogeneous Computing Environments., , , and . MCSoC, page 209-216. IEEE Computer Society, (2018)Element-by-Element Schur Complement Approximations for General Nonsymmetric Matrices of Two-by-Two Block Form., , and . LSSC, volume 5910 of Lecture Notes in Computer Science, page 108-115. Springer, (2009)Numerical simulation of the coupling problems of a solid sphere impacting on a liquid free surface., and . Mathematics and Computers in Simulation, 80 (8): 1664-1673 (2010)Efficient Preconditioners for Large Scale Binary Cahn-Hilliard Models., , and . Comput. Meth. in Appl. Math., 12 (1): 1-22 (2012)High-Accuracy Architecture-Level Power Estimation for Partitioned SRAM Arrays in a 65-nm CMOS BPTM Process., , and . DSD, page 249-256. IEEE Computer Society, (2007)DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures., , and . Applied Informatics, page 767-772. IASTED/ACTA Press, (2003)Block-Preconditioners for Conforming and Non-conforming FEM Discretizations of the Cahn-Hilliard Equation., , and . LSSC, volume 7116 of Lecture Notes in Computer Science, page 549-557. Springer, (2011)Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays., , , and . ISQED, page 185-191. IEEE Computer Society, (2007)