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Disambiguation of "Chen, Linbin"

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CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems.

, , , and . NANOARCH, page 58-64. ACM, (2018)

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Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Yingxing Cheng University of Stuttgart

 

Other publications of authors with the same name

Design and operational assessment of an intra-cell hybrid L2 cache., , , and . NANOARCH, page 1-6. IEEE, (2017)Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC)., , , and . IEEE Trans. Computers, 68 (5): 784-790 (2019)Design of Approximate Unsigned Integer Non-restoring Divider for Inexact Computing., , , and . ACM Great Lakes Symposium on VLSI, page 51-56. ACM, (2015)Design, Evaluation and Application of Approximate High-Radix Dividers., , , , and . IEEE Trans. Multi-Scale Computing Systems, 4 (3): 299-312 (2018)Design and reliability analysis of multiple valued logic gates using carbon nanotube FETs., , , and . NANOARCH, page 131-138. ACM, (2012)Design and Analysis of Inexact Floating-Point Adders., , , , and . IEEE Trans. Computers, 65 (1): 308-314 (2016)Algorithm and Design of a Fully Parallel Approximate Coordinate Rotation Digital Computer (CORDIC)., , , and . IEEE Trans. Multi-Scale Computing Systems, 3 (3): 139-151 (2017)On the Design of Approximate Restoring Dividers for Error-Tolerant Applications., , , and . IEEE Trans. Computers, 65 (8): 2522-2533 (2016)CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems., , , and . NANOARCH, page 58-64. ACM, (2018)Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition., , , , and . ACM Great Lakes Symposium on VLSI, page 293-298. ACM, (2017)