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A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.

S. Shin, J. Rudell, D. Daly, C. Muñoz, D. Chang, K. Gulati, H. Lee, and M. Straayer. J. Solid-State Circuits, 49 (6): 1366-1382 (2014)

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Denis Dertli University of Stuttgart

Pavel Denisov University of Stuttgart

C. Traut

C. Honold

Denis Schwachhofer University of Stuttgart

Other publications of authors with the same name

27.5 A 4GS/s time-interleaved RF ADC in 65nm CMOS with 4GHz input bandwidth.M. Straayer, J. Bales, D. Birdsall, D. Daly, P. Elliott, B. Foley, R. Mason, V. Singh, and X. Wang. ISSCC, page 464-465. IEEE, (2016)Technologies for Ultradynamic Voltage Scaling.A. Chandrakasan, D. Daly, D. Finchelstein, J. Kwong, Y. Ramadass, M. Sinangil, V. Sze, and N. Verma. Proceedings of the IEEE, 98 (2): 191-214 (2010)An Energy-Efficient OOK Transceiver for Wireless Sensor Networks.D. Daly, and A. Chandrakasan. J. Solid-State Circuits, 42 (5): 1003-1011 (2007)Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes.B. Calhoun, D. Daly, N. Verma, D. Finchelstein, D. Wentzloff, A. Wang, S. Cho, and A. Chandrakasan. IEEE Trans. Computers, 54 (6): 727-740 (2005)A Low-Voltage Energy-Sampling IR-UWB Digital Baseband Employing Quadratic Correlation.P. Mercier, M. Bhardwaj, D. Daly, and A. Chandrakasan. J. Solid-State Circuits, 45 (6): 1209-1219 (2010)A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.S. Shin, J. Rudell, D. Daly, C. Muñoz, D. Chang, K. Gulati, H. Lee, and M. Straayer. J. Solid-State Circuits, 49 (6): 1366-1382 (2014)A 12b 200MS/s frequency scalable zero-crossing based pipelined ADC in 55nm CMOS.S. Shin, J. Rudell, D. Daly, C. Muñoz, D. Chang, K. Gulati, H. Lee, and M. Straayer. CICC, page 1-4. IEEE, (2012)A pulsed UWB receiver SoC for insect motion control.D. Daly, P. Mercier, M. Bhardwaj, A. Stone, J. Voldman, R. Levine, J. Hildebrand, and A. Chandrakasan. ISSCC, page 200-201. IEEE, (2009)A 6b 0.2-to-0.9V Highly Digital Flash ADC with Comparator Redundancy.D. Daly, and A. Chandrakasan. ISSCC, page 554-555. IEEE, (2008)Ultra-low-power UWB for sensor network applications.P. Mercier, D. Daly, M. Bhardwaj, D. Wentzloff, F. Lee, and A. Chandrakasan. ISCAS, page 2562-2565. IEEE, (2008)

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Disambiguation of "Daly, Denis C."

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A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.

Please choose a person to relate this publication to

Denis Dertli University of Stuttgart

Pavel Denisov University of Stuttgart

C. Traut

C. Honold

Denis Schwachhofer University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Daly, Denis C."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.

Please choose a person to relate this publication to

Denis Dertli University of Stuttgart

Pavel Denisov University of Stuttgart

C. Traut

C. Honold

Denis Schwachhofer University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.