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Toward Holistic Modeling, Margining and Tolerance of IC Variability.. ISVLSI, page 284-289. IEEE Computer Society, (2014)Impact of adaptive voltage scaling on aging-aware signoff., , and . DATE, page 1683-1688. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Enhanced metamodeling techniques for high-dimensional IC design estimation problems., , and . DATE, page 1861-1866. EDA Consortium San Jose, CA, USA / ACM DL, (2013)On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools., and . ICCAD, page 17-21. IEEE Computer Society, (2000)Incremental multiple-scan chain ordering for ECO flip-flop insertion., , and . ICCAD, page 705-712. IEEE, (2013)High-performance gate sizing with a signoff timer., , , , and . ICCAD, page 450-457. IEEE, (2013)Benchmarking of mask fracturing heuristics., , , , , and . ICCAD, page 246-253. IEEE, (2014)Optimizing Stochastic Circuits for Accuracy-Energy Tradeoffs., , , , and . ICCAD, page 178-185. IEEE, (2015)A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances., and . ISQED, page 467-474. IEEE Computer Society, (2007)On-Line Adjustable Buffering for Runtime Power Reduction., , and . ISQED, page 550-555. IEEE Computer Society, (2007)