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Session 20 - Manufacturing beyond moore's law., and . CICC, page 1. IEEE, (2015)Lithography Options for the 32 nm Half Pitch Node and Beyond., , , , , , , , and . IEEE Trans. on Circuits and Systems, 56-I (8): 1884-1891 (2009)AlGaAs/GaAs: High electron mobility transistor simulations with PRISM., , , , , , , and . European Transactions on Telecommunications, 1 (4): 433-437 (1990)RF ESD protection strategies - the design and performance trade-off challenges., , , , , , , , , and 5 other author(s). CICC, page 489-496. IEEE, (2005)Lithography options for the 32nm half pitch node and beyond., , , , , , and . CICC, page 371-378. IEEE, (2008)ESD circuit model based protection network optimisation for extended-voltage NMOS drivers., , , , and . Microelectronics Reliability, 45 (9-11): 1430-1435 (2005)Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications., , , , , , , and . CICC, page 49-52. IEEE, (2008)CMOS scaling and three-dimensional silicon integration., and . CICC, page 652-653. IEEE, (2005)Process integration and manufacturing issues., and . CICC, IEEE, (2009)Session 6 - Advanced SoC/SiP integration & co-design., and . CICC, IEEE, (2008)