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Disambiguation of "Plosila, Juha"

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Energy-efficient concurrent testing approach for many-core systems in the dark silicon age.

, , , , and . DFT, page 270-275. IEEE Computer Society, (2014)

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HARAQ: Congestion-Aware Learning Model for Highly Adaptive Routing Algorithm in On-Chip Networks., , , , , , and . NOCS, page 19-26. IEEE Computer Society, (2012)Generic Monitoring and Management Infrastructure for 3D NoC-Bus Hybrid Architectures., , , , , and . NOCS, page 177-184. IEEE Computer Society, (2012)High-performance on-chip network platform for memory-on-processor architectures., , , , and . ReCoSoC, page 1-6. IEEE, (2011)DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs., , , , , and . VLSI Design, page 547-552. IEEE Computer Society, (2015)Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's., , , , and . DSD, page 643-648. IEEE Computer Society, (2011)Generation of Structural VHDL Code with Library Components from Formal Event-B Models., , , and . DSD, page 111-118. IEEE Computer Society, (2013)Customizable Compression Architecture for Efficient Configuration in CGRAs., , , , , , , and . FCCM, page 31. IEEE Computer Society, (2014)Power-Efficient Inter-Layer Communication Architectures for 3D NoC., , , , , and . ISVLSI, page 355-356. IEEE Computer Society, (2011)Input-Output Selection Based Router for Networks-on-Chip., , , , and . ISVLSI, page 92-97. IEEE Computer Society, (2010)CARS: congestion-aware request scheduler for network interfaces in NoC-based manycore systems., , , and . DATE, page 1048-1051. EDA Consortium San Jose, CA, USA / ACM DL, (2013)