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Joint Equalization and Coding for On-Chip Bus Communication.

, , and . IEEE Trans. VLSI Syst., 16 (3): 314-318 (2008)

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A low-power bus design using joint repeater insertion and coding., and . ISLPED, page 99-102. ACM, (2005)Joint Equalization and Coding for On-Chip Bus Communication., , and . IEEE Trans. VLSI Syst., 16 (3): 314-318 (2008)Reliable low-power digital signal processing via reduced precision redundancy., , and . IEEE Trans. VLSI Syst., 12 (5): 497-510 (2004)Coding for Reliable On-Chip Buses: A Class of Fundamental Bounds and Practical Codes., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (5): 977-982 (2007)Coding for system-on-chip networks: a unified framework., and . DAC, page 103-106. ACM, (2004)Area and Energy-Efficient Crosstalk Avoidance Codes for On-Chip Buses., , and . ICCD, page 12-17. IEEE Computer Society, (2004)Coding for Reliable On-Chip Buses: Fundamental Limits and Practical Codes., and . VLSI Design, page 417-422. IEEE Computer Society, (2005)Microwatt Embedded Processor Platform for Medical System-on-Chip Applications., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 46 (4): 721-730 (2011)Joint Equalization and Coding for On-Chip Bus Communication., , and . ISQED, page 642-647. IEEE Computer Society, (2005)Coding for system-on-chip networks: a unified framework., and . IEEE Trans. VLSI Syst., 13 (6): 655-667 (2005)