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A comparison of core power gating strategies implemented in modern hardware., , , , , and . SIGMETRICS, page 559-560. ACM, (2014)Increasing TLB reach by exploiting clustering in page translations., , , and . HPCA, page 558-567. IEEE Computer Society, (2014)Implications of Integrated CPU-GPU Processors on Thermal and Power Management Techniques., , , , , and . CoRR, (2018)Prefetching Techniques for Near-memory Throughput Processors., , , , , and . ICS, page 40:1-40:14. ACM, (2016)Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism., , , , , , , , and . CoRR, (2016)Interconnect-Memory Challenges for Multi-chip, Silicon Interposer Systems., , , and . MEMSYS, page 3-10. ACM, (2015)CODA: Enabling Co-location of Computation and Data for Near-Data Processing., , , , , , , and . CoRR, (2017)Something old and something new: P-states can borrow microarchitecture techniques too., , , and . ISLPED, page 385-390. ACM, (2012)CODA: Enabling Co-location of Computation and Data for Multiple GPU Systems., , , , , , , and . ACM Trans. Archit. Code Optim., 15 (3): 32:1-32:23 (2018)