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Harmonic distortion analysis using an improved charge sheet model for PD SOI MOSFETs.

, , , and . Microelectronics Journal, 38 (3): 321-326 (2007)

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On the UTBB SOI MOSFET performance improvement in quasi-double-gate regime., , and . ESSDERC, page 246-249. IEEE, (2012)Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference., , , , , and . Sensors, 13 (12): 17265-17280 (2013)Variability of UTBB MOSFET analog figures of merit in wide frequency range., , , , , , , and . ESSDERC, page 222-225. IEEE, (2014)Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer., , , , , , and . Microelectronics Reliability, 51 (2): 326-331 (2011)Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets., , , , , and . ESSDERC, page 194-197. IEEE, (2013)Characterization and modelling of single event transients in LDMOS-SOI FETs., , , and . Microelectronics Reliability, 51 (9-11): 2004-2009 (2011)Harmonic distortion analysis using an improved charge sheet model for PD SOI MOSFETs., , , and . Microelectronics Journal, 38 (3): 321-326 (2007)Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs., , , and . Microelectronics Reliability, 50 (9-11): 1852-1856 (2010)Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications., , , , , , , , and . ESSDERC, page 236-239. IEEE, (2017)Back-gate bias effect on UTBB-FDSOI non-linearity performance., , , , , , and . ESSDERC, page 148-151. IEEE, (2017)