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Boolean and current detection of MOS transistor with gate oxide short.

, , , , and . ITC, page 1039-1048. IEEE Computer Society, (2001)

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An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions., , and . DDECS, page 158-163. IEEE Computer Society, (2009)Delay Testing Viability of Gate Oxide Short Defects., , , and . J. Comput. Sci. Technol., 20 (2): 195-200 (2005)Algebraic Specification of a 3D-Modeler Based on Hypermaps., and . CVGIP: Graphical Model and Image Processing, 56 (1): 29-60 (1994)Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits., , and . DATE, page 815-821. IEEE Computer Society, (1998)On the Use of an Oscillation-Based Test Methodology for CMOS Micro-Electro-Mechanical Systems., , , and . DATE, page 1120. IEEE Computer Society, (2002)A Low-Cost Adaptive Ramp Generator for Analog BIST Applications., , , , and . VTS, page 266-271. IEEE Computer Society, (2001)Serial transistor network modeling for bridging fault simulation., , and . Asian Test Symposium, page 100-106. IEEE Computer Society, (1995)The Logic Threshold Based Voting: A Model for Local Feedback Bridging Fault., , and . EDCC, volume 1150 of Lecture Notes in Computer Science, page 205-213. Springer, (1996)The Configuration Ratio: A Model for Simulating CMOS Intra-Gate Bridge with Variable Logic Thresholds., , and . EDCC, volume 852 of Lecture Notes in Computer Science, page 165-177. Springer, (1994)Topological Encoding of 3D Segmented Images., , and . DGCI, volume 1953 of Lecture Notes in Computer Science, page 311-324. Springer, (2000)