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Decentralized control for dynamically reconfigurable FPGA systems., , and . Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-A): 871-884 (2013)Multiple Abstraction Views of FPGA to Map Parallel Applications., , and . ReCoSoC, page 90-97. Univ. Montpellier II, (2007)Traceability and Interoperability in Models Transformations., , and . FDL, page 543-555. ECSI, (2005)MDA Based, SystemC Code Generation, Applied to Intensive Signal Processing Applications., , and . FDL, page 452-463. ECSI, (2004)Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives., , , , and . Journal of Systems Architecture - Embedded Systems Design, 58 (5): 178-194 (2012)High level design of adaptive distributed controller for partial dynamic reconfiguration in FPGA., , , and . DASIP, page 308-315. IEEE, (2011)Distributed Process Networks - Using Half FIFO Queues in CORBA., , , and . PARCO, volume 13 of Advances in Parallel Computing, page 31-38. Elsevier, (2003)Modeling and Formal Validation of High-Performance Embedded Systems., , , , and . ISPDC, page 215-222. IEEE Computer Society, (2008)System level modeling methodology of NoC design from UML-MARTE to VHDL., , , , , and . Design Autom. for Emb. Sys., 16 (4): 161-187 (2012)Analysis and Simulation of an Out-Of-Order Execution Model in Vector Multiprocessor Systems., and . Parallel Computing, 23 (13): 1963-1986 (1997)