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BugNet: Continuously Recording Program Execution for Deterministic Replay Debugging.

, , and . ISCA, page 284-295. IEEE Computer Society, (2005)

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POSTER: Fault-tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support., , , , and . PACT, page 421-422. ACM, (2016)Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support., , , , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 16-30. Springer, (2017)Maple: a coverage-driven testing tool for multithreaded programs., , , and . OOPSLA, page 485-502. ACM, (2012)An analytic model of optimistic Software Transactional Memory., , and . ISPASS, page 153-162. IEEE Computer Society, (2009)An analytic framework for performance modeling of software transactional memory., and . Computer Networks, 53 (8): 1202-1214 (2009)Huron: hybrid false sharing detection and repair., , , , and . PLDI, page 453-468. ACM, (2019)An Analytic Model for Optimistic STM with Lazy Locking., and . ASMTA, volume 5513 of Lecture Notes in Computer Science, page 339-353. Springer, (2009)QuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs., , , , , , , , , and 1 other author(s). ISCA, page 643-654. ACM, (2013)Concurrent predicates: A debugging technique for every parallel programmer., , , and . PACT, page 331-340. IEEE Computer Society, (2013)LASER: Light, Accurate Sharing dEtection and Repair., , , , , , and . HPCA, page 261-273. IEEE Computer Society, (2016)