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Disambiguation of "Barke, Erich"

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Wirelength Reduction Using 3-D Physical Design.

, , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 453-462. Springer, (2004)

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Hon. -Prof. Dr. -Ing. Erich Schelkle University of Stuttgart

Prof. Dr. Erich Zahn University of Stuttgart

Prof. Dr. Erich Kasper University of Stuttgart

Erich Rittmaier University of Stuttgart

Hon. -Prof. Dr. -Ing. Erich Reinhardt University of Stuttgart

 

Other publications of authors with the same name

Figurenorientierte boolesche Maskenoperationen für die Layout-Prüfung integrierter Schaltungen / Polygon-based boolean mask operations to be used in IC design rule checking.. Elektronische Rechenanlagen, 26 (1): 20-28 (1984)A Network Comparison Algorithm for Layout Verification of Integrated Circuits.. IEEE Trans. on CAD of Integrated Circuits and Systems, 3 (2): 135-141 (1984)An Approach to Model Checking for Nonlinear Analog Systems., , and . DATE, page 1080. IEEE Computer Society, (2002)PALACE: A Parallel and Hierarchical Layout Analyzer and Circuit Extractor., , and . ED&TC, page 357-361. IEEE Computer Society, (1996)Architecture driven partitioning., and . DATE, page 479-487. IEEE Computer Society, (2001)Using analog circuit behavior to generate SystemC events for an acceleration of mixed-signal simulation., , , and . ICCD, page 108-112. IEEE Computer Society, (2011)Line-to-ground capacitance calculation for VLSI: a comparison.. IEEE Trans. on CAD of Integrated Circuits and Systems, 7 (2): 295-298 (1988)Analog circuit simulation using range arithmetics., , and . ASP-DAC, page 762-767. IEEE, (2008)Routing of analog busses with parasitic symmetry., , , and . ISPD, page 14-19. ACM, (2005)A Universal CLA Adder Generator for SRAM-Based FPGAs., and . FPL, volume 1142 of Lecture Notes in Computer Science, page 44-54. Springer, (1996)