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Disambiguation of "Teich, Jürgen"

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A deeply pipelined and parallel architecture for denoising medical images.

, , , and . FPT, page 485-490. IEEE, (2010)

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apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays., , and . J. Low Power Electronics, 7 (1): 29-40 (2011)Online placement for dynamically reconfigurable devices., , and . IJES, 1 (3/4): 165-178 (2005)Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators., , and . FCCM, page 279-282. IEEE Computer Society, (2009)Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models., , and . FDL, page 1-6. IEEE, (2008)A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template., , , and . ReCoSoC, page 31-37. Univ. Montpellier II, (2006)A feasibility-preserving local search operator for constrained discrete optimization problems., , , and . IEEE Congress on Evolutionary Computation, page 1968-1975. IEEE, (2008)Parametric yield optimization using leakage-yield-driven floorplanning., , and . PATMOS, page 1-6. IEEE, (2014)Digitale Hardware/Software-Systeme - Synthese und Optimierung.. Springer, (1997)A rule-based static dataflow clustering algorithm for efficient embedded software synthesis., , , and . DATE, page 521-526. IEEE, (2011)Multi-objective distributed run-time resource management for many-cores., , and . DATE, page 1-6. European Design and Automation Association, (2014)