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Disambiguation of "Xie, Xiang-Hui"

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A PAM-4 adaptive analog equalizer with decoupling control loops for 25-Gb/s CMOS serial-link receiver.

, , , , , and . SoCC, page 221-226. IEEE, (2015)

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Xiang Hao University of Stuttgart

Yifan Xie University of Stuttgart

Xiang Xu University of Stuttgart

Univ. -Prof. Dr. Johan Alexander Huisman University of Stuttgart

 

Other publications of authors with the same name

Cooperative Computing Techniques for a Deeply Fused and Heterogeneous Many-Core Processor Architecture., , , , , and . J. Comput. Sci. Technol., 30 (1): 145-162 (2015)High-Performance Architecture for the Conjugate Gradient Solver on FPGAs., , , and . IEEE Trans. on Circuits and Systems, 60-II (11): 791-795 (2013)Evolution of supercomputers., , , and . Frontiers of Computer Science in China, 4 (4): 428-436 (2010)SRS: A Split-Range Shared Memory Consistency Model for Thousand-Core Processors., , and . ACA, volume 451 of Communications in Computer and Information Science, page 31-42. Springer, (2014)A parallel logic simulation framework: study, implementation, and performance., , , , and . SpringSim, page 150. SCS/ACM, (2010)ArchSim: A System-Level Parallel Simulation Platform for the Architecture Design of High Performance Computer., , , , , , and . J. Comput. Sci. Technol., 24 (5): 901-912 (2009)A new parallel lattice reduction algorithm for BKZ reduced bases., , , and . SCIENCE CHINA Information Sciences, 57 (9): 1-10 (2014)A PAM-4 adaptive analog equalizer with decoupling control loops for 25-Gb/s CMOS serial-link receiver., , , , , and . SoCC, page 221-226. IEEE, (2015)Implementing Molecular Dynamics Simulation on Sunway TaihuLight System., , , , , , and . HPCC/SmartCity/DSS, page 443-450. IEEE Computer Society, (2016)Parallelizing sparse LU decomposition on FPGAs., , , , , and . FPT, page 352-359. IEEE, (2012)