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Disambiguation of "Engels, Sylvain"

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Logical effort model extension to propagation delay representation.

, , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (9): 1677-1684 (2006)

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Johannes Engels University of Stuttgart

Dr. -Ing. Johannes Engels University of Stuttgart

 

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Logical effort model extension to propagation delay representation., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (9): 1677-1684 (2006)A 6-Wire Plug and Play Clockless Distributed On-Chip-Sensor Network in 28 nm UTBB FD-SOI., , , and . J. Low Power Electronics, 14 (3): 404-413 (2018)On-Chip Process Variability Monitoring Flow., , , , , , and . J. Low Power Electronics, 6 (4): 601-606 (2010)A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects., , , and . Integration, 39 (4): 433-456 (2006)Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs., , , , , , , , , and 10 other author(s). DATE, page 613-618. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A Design Flow for Shaping Electromagnetic Emissions in Micropipeline Circuits., , and . ASYNC, page 28-29. IEEE Computer Society, (2018)A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC., , , , , , , , , and 4 other author(s). J. Solid-State Circuits, 49 (7): 1475-1486 (2014)A Distributed Body-Biasing Strategy for Asynchronous Circuits., , , , , , , , and . VLSI-SoC, page 27-32. IEEE, (2019)Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology., , , , , , , , , and 4 other author(s). ISSCC, page 424-425. IEEE, (2013)Statistical Characterization of Library Timing Performance., , , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 468-476. Springer, (2006)