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Disambiguation of "Fujimori, Ichiro"

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A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS.

, , , , , , , , , and . J. Solid-State Circuits, 50 (12): 3089-3100 (2015)

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Other publications of authors with the same name

A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS., , , , , , and . VLSIC, page 1-2. IEEE, (2014)A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 45 (6): 1172-1185 (2010)10.3 An analog front-end for 100BASE-T1 automotive Ethernet in 28nm CMOS., , , , , , , , , and 9 other author(s). ISSCC, page 186-187. IEEE, (2016)A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS., , , , , , and . J. Solid-State Circuits, 50 (4): 856-866 (2015)F1: High-speed interleaved ADCs., , , and . ISSCC, page 1-2. IEEE, (2015)F4: Emerging short-reach and high-density interconnect solutions for internet of everything., , , , , and . ISSCC, page 502-505. IEEE, (2016)19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC., , , , , , , and . ISSCC, page 324-325. IEEE, (2016)A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS., , , , , , , , and . J. Solid-State Circuits, 49 (12): 3141-3155 (2014)21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber., , , , , , , , , and 3 other author(s). ISSCC, page 370-371. IEEE, (2009)Session 7 overview: Optical transceivers and silicon photonics., and . ISSCC, page 114-115. IEEE, (2013)