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Design space exploration of partially re-configurable embedded processors.

, , , , , , and . DATE, page 319-324. EDA Consortium, San Jose, CA, USA, (2007)

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A design flow for configurable embedded processors based on optimized instruction set extension synthesis., , , and . DATE, page 581-586. European Design and Automation Association, Leuven, Belgium, (2006)ASIP architecture exploration for efficient IPSec encryption: A case study., , , , , , , , and . ACM Trans. Embedded Comput. Syst., 6 (2): 12 (2007)Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors., , , , , , , , and . ACM Trans. Embedded Comput. Syst., 7 (4): 40:1-40:31 (2008)Software Instrumentation., , and . Wiley Encyclopedia of Computer Science and Engineering, John Wiley & Sons, Inc., (2008)Fine-grained application source code profiling for ASIP design., , , , , and . DAC, page 329-334. ACM, (2005)A SW performance estimation framework for early system-level-design using fine-grained instrumentation., , , , , and . DATE, page 468-473. European Design and Automation Association, Leuven, Belgium, (2006)Memory Access Micro-Profiling for ASIP Design., , , , and . DELTA, page 255-262. IEEE Computer Society, (2006)ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study., , , , , , , , and . SCOPES, volume 3199 of Lecture Notes in Computer Science, page 33-46. Springer, (2004)Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors., , , , , , and . IEEE International Workshop on Rapid System Prototyping, page 189-194. IEEE Computer Society, (2007)Design space exploration of partially re-configurable embedded processors., , , , , , and . DATE, page 319-324. EDA Consortium, San Jose, CA, USA, (2007)