Author of the publication

Cell Nonvolatile Memories with Emerging Ferroelectric FETs.

X. Li, J. Wu, K. Ni, S. George, K. Ma, J. Sampson, S. Gupta, Y. Liu, H. Yang, S. Datta, and V. Narayanan. IEEE Design & Test, 36 (3): 39-45 (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

George Basem Fouad Eskandar University of Stuttgart

Other publications of authors with the same name

Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.X. Li, J. Wu, K. Ni, S. George, K. Ma, J. Sampson, S. Gupta, Y. Liu, H. Yang, S. Datta and 1 other author(s). IEEE Design & Test, 36 (3): 39-45 (2019)Harnessing Emerging Technology for Compute-in-Memory Support.N. Jao, A. Ramanathan, S. Srinivasa, S. George, J. Sampson, and V. Narayanan. ISVLSI, page 447-452. IEEE Computer Society, (2018)Ferroelectric Transistor based Non-Volatile Flip-Flop.D. Wang, S. George, A. Aziz, S. Datta, V. Narayanan, and S. Gupta. ISLPED, page 10-15. ACM, (2016)Harnessing ferroelectrics for non-volatile memories and logic.S. Gupta, D. Wang, S. George, A. Aziz, X. Li, S. Datta, and V. Narayanan. ISQED, page 29-34. IEEE, (2017)Enabling Internet-of-Things: Opportunities brought by emerging devices, circuits, and architectures.X. Li, K. Ma, S. George, J. Sampson, and V. Narayanan. VLSI-SoC, page 1-6. IEEE, (2016)Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops.X. Li, S. George, K. Ma, W. Tsai, A. Aziz, J. Sampson, S. Gupta, M. Chang, Y. Liu, S. Datta and 1 other author(s). IEEE Trans. on Circuits and Systems, 64-I (11): 2907-2919 (2017)Nonvolatile memory design based on ferroelectric FETs.S. George, K. Ma, A. Aziz, X. Li, A. Khan, S. Salahuddin, M. Chang, S. Datta, J. Sampson, S. Gupta and 1 other author(s). DAC, page 118:1-118:6. ACM, (2016)Device Circuit Co Design of FEFET Based Logic for Low Voltage Processors.S. George, A. Aziz, X. Li, M. Kim, S. Datta, J. Sampson, S. Gupta, and V. Narayanan. ISVLSI, page 649-654. IEEE Computer Society, (2016)MDACache: Caching for Multi-Dimensional-Access Memories.S. George, M. Liao, H. Jiang, J. Kotra, M. Kandemir, J. Sampson, and V. Narayanan. MICRO, page 841-854. IEEE Computer Society, (2018)

PUMA

Disambiguation of "George, Sumitha"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.

Please choose a person to relate this publication to

George Basem Fouad Eskandar University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "George, Sumitha"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.

Please choose a person to relate this publication to

George Basem Fouad Eskandar University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.