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Fast and robust differential flipflops and their extension to multi-input threshold gates.

, , , and . ISCAS, page 822-825. IEEE, (2015)

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Spintronic Threshold Logic Array (STLA) - A compact, low leakage, non-volatile gate array architecture., , and . J. Parallel Distrib. Comput., 74 (6): 2452-2460 (2014)Dynamic and leakage power reduction of ASICs using configurable threshold logic gates., , , , and . CICC, page 1-4. IEEE, (2015)Minimizing area and power of sequential CMOS circuits using threshold decomposition., , and . ICCAD, page 605-612. ACM, (2012)Identification of Threshold Functions and Synthesis of Threshold Networks., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (5): 665-677 (2011)A fast, energy efficient, field programmable threshold-logic array., , and . FPT, page 300-305. IEEE, (2014)Fast and robust differential flipflops and their extension to multi-input threshold gates., , , and . ISCAS, page 822-825. IEEE, (2015)Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold Logic Flip-Flops., , , and . IEEE Trans. VLSI Syst., 24 (9): 2873-2886 (2016)Efficient Enumeration of Unidirectional Cuts for Technology Mapping of Boolean Networks., and . CoRR, (2016)Digital IP Protection Using Threshold Voltage Control., , , , and . CoRR, (2016)A Clock Skewing Strategy to Reduce Power and Area of ASIC Circuits., , and . DAC, page 67:1-67:6. ACM, (2017)