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Disambiguation of "Kim, Nam Sung"

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Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors.

, , , , and . IEEE Trans. VLSI Syst., 22 (4): 747-758 (2014)

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Nam Tran University of Stuttgart

Kim Meliani University of Stuttgart

Joel Kimmich University of Stuttgart

Deniz Namli University of Stuttgart

Do Yeon Kim University of Stuttgart

 

Other publications of authors with the same name

REEL: Reducing effective execution latency of floating point operations., , , , , and . ISLPED, page 187-192. IEEE, (2013)A Linear Algebra Core Design for Efficient Level-3 BLAS., , , , , and . ASAP, page 149-152. IEEE Computer Society, (2012)The conversion from similarity for mobile life-log to euclidean distance., , , , and . ICMLC, page 1087-1091. IEEE, (2013)ScalCore: Designing a core for voltage scalability., , , , , and . HPCA, page 681-693. IEEE Computer Society, (2016)Fair share: Allocation of GPU resources for both performance and fairness., , and . ICCD, page 440-447. IEEE Computer Society, (2014)VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches., , , and . ICCD, page 654-661. IEEE Computer Society, (2016)Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 44 (4): 1199-1208 (2009)Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation., , , , , , , and . IEEE Micro, 24 (6): 10-20 (2004)Quantitative analysis and optimization techniques for on-chip cache leakage power., , and . IEEE Trans. VLSI Syst., 13 (10): 1147-1156 (2005)CTA-Aware Prefetching and Scheduling for GPU., , , , and . IPDPS, page 137-148. IEEE Computer Society, (2018)