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Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM.

, , , and . DAC, page 100:1-100:4. ACM, (2016)

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A simplex algorithm for LP decoding hardware., , , and . PIMRC, page 790-794. IEEE, (2014)A new architecture for high throughput, low latency NB-LDPC check node processing., , , , , and . PIMRC, page 1392-1397. IEEE, (2015)Cross-Layer Error Resilience and Its Application to Wireless Communication Systems., , and . J. Low Power Electronics, 9 (1): 119-132 (2013)Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience., , , , , , , , , and 10 other author(s). Microelectronics Reliability, 54 (6-7): 1066-1074 (2014)Reliability: A Cross-Disciplinary and Cross-Layer Approach.. Asian Test Symposium, page 496-497. IEEE Computer Society, (2011)Scheduling of behavioral VHDL by retiming techniques., , , , , , and . EURO-DAC, page 546-551. IEEE Computer Society, (1994)Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization., and . EDAC-ETC-EUROASIC, page 630-634. IEEE Computer Society, (1994)Embedded DRAM Development: Technology, Physical Design, and Application Issues., and . IEEE Design & Test of Computers, 18 (3): 7-15 (2001)Exploration and Optimization of 3-D Integrated DRAM Subsystems., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (4): 597-610 (2013)Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding).. it - Information Technology, 45 (6): 336-343 (2003)