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Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations.

, , , , , and . IEEE Trans. VLSI Syst., 23 (2): 374-378 (2015)

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Comparison of modular numbers based on the chinese remainder theorem with fractional values., , , , , and . Automatic Control and Computer Sciences, 49 (6): 354-365 (2015)Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations., , , , , and . IEEE Trans. VLSI Syst., 23 (2): 374-378 (2015)Efficient Reverse Converter Designs for the New 4-Moduli Sets 2n -1, 2n, 2n +1, 22n + 1-1 and 2n -1, 2n +1, 22n, 22n +1 Based on New CRTs., , , , and . IEEE Trans. on Circuits and Systems, 57-I (4): 823-835 (2010)A new four-modulus RNS to binary converter., , and . ISCAS, page 4161-4164. IEEE, (2010)A Reverse Converter for the Enhanced Moduli Set 2n-1, 2n+1, 22n, 22n+1-1 Using CRT and MRC., and . ISVLSI, page 456-457. IEEE Computer Society, (2010)RNS reverse converters for moduli sets with dynamic ranges of 9n-bit., , and . LASCAS, page 143-146. IEEE, (2016)How to Teach Residue Number System to Computer Scientists and Engineers., , and . IEEE Trans. Education, 54 (1): 156-163 (2011)Efficient RNS to binary converters for the new 4-moduli set 2n, 2n+1-1, 2n-1, 2n-1-1., , , , and . IEICE Electronic Express, 9 (1): 1-7 (2012)An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form 2k, 2P-1., , , and . IEEE Trans. VLSI Syst., 25 (1): 48-59 (2017)Zero-Aware Low-Precision RNS Scaling Scheme.. Axioms, 11 (1): 5 (2022)