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Disambiguation of "Takeuchi, Ken"

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95%-lower-BER 43%-lower-power intelligent solid-state drive (SSD) with asymmetric coding and stripe pattern elimination algorithm.

, , , , , and . ISSCC, page 204-206. IEEE, (2011)

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PD Dr. Martin Kenner University of Stuttgart

Finn Kenklies University of Stuttgart

 

Other publications of authors with the same name

Heterogeneously integrated program voltage generator for 1.0V operation NAND flash with best mix & match of standard CMOS process and NAND flash process., , , and . ESSCIRC, page 67-70. IEEE, (2016)Near Threshold Voltage Word-Line Voltage Injection Self-Convergence Scheme for Local Electron Injected Asymmetric Pass Gate Transistor 6T-SRAM., , , and . IEEE Trans. on Circuits and Systems, 59-I (8): 1635-1643 (2012)LBA Scrambler: A NAND Flash Aware Data Management Scheme for High-Performance Solid-State Drives., , , , and . IEEE Trans. VLSI Syst., 24 (1): 115-128 (2016)An Inductively Powered Wireless Solid-State Drive System With Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories., , , , , , , and . J. Solid-State Circuits, 51 (4): 1041-1050 (2016)Introduction to the Special Issue on the 2018 Symposium on VLSI Circuits., and . J. Solid-State Circuits, 54 (4): 911-913 (2019)0.6 V operation, 26% smaller voltage ripple, 9% energy efficient boost converter with adaptively optimized comparator bias-current for ReRAM program in low power IoT embedded applications., , , , and . A-SSCC, page 1-4. IEEE, (2015)Reset-Check-Reverse-Flag Scheme on NRAM With 50% Bit Error Rate or 35% Parity Overhead and 16% Decoding Latency Reductions for Read-Intensive Storage Class Memory., , , , , , , and . J. Solid-State Circuits, 51 (8): 1938-1951 (2016)Design Considerations for an Information Query Computer., , , , , and . Advanced Database Machine Architecture, page 130-167. Prentice-Hall, (1983)Over 10-times high-speed, energy efficient 3D TSV-integrated hybrid ReRAM/MLC NAND SSD by intelligent data fragmentation suppression., , , , , and . ASP-DAC, page 81-82. IEEE, (2013)Highly reliable solid-state drives (SSDs) with error-prediction LDPC (EP-LDPC) architecture and error-recovery scheme., , and . ASP-DAC, page 83-84. IEEE, (2013)