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Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns

D. Erb, K. Scheibler, M. Kochte, M. Sauer, H. Wunderlich, and B. Becker. 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), page 749-754. Piscataway, IEEE, (2016)
DOI: 10.1109/ASPDAC.2016.7428101

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Dr. -Ing. Thomas Erb University of Stuttgart

Dominik Morar

Dominik Morar University of Stuttgart

Dominik Hose

Dominik Ziehr University of Stuttgart

Other publications of authors with the same name

Applying Tailored Formal Methods to X-ATPG.K. Scheibler, D. Erb, and B. Becker. MBMV, page 138. Albert-Ludwigs-Universität Freiburg, (2016)Accurate QBF-Based Test Pattern Generation in Presence of Unknown ValuesD. Erb, M. Kochte, S. Reimer, M. Sauer, H. Wunderlich, and B. Becker. IEEE transactions on computer-aided design of integrated circuits and systems, 34 (12): 2025-2038 (2015)Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects.D. Erb, K. Scheibler, M. Sauer, S. Reddy, and B. Becker. ATS, page 131-136. IEEE Computer Society, (2014)Improving test pattern generation in presence of unknown values beyond restricted symbolic logic.K. Scheibler, D. Erb, and B. Becker. ETS, page 1-6. IEEE, (2015)Accurate QBF-based test pattern generation in presence of unknown values.S. Hillebrecht, M. Kochte, D. Erb, H. Wunderlich, and B. Becker. DATE, page 436-441. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Efficient SMT-based ATPG for interconnect open defects.D. Erb, K. Scheibler, M. Sauer, and B. Becker. DATE, page 1-6. European Design and Automation Association, (2014)Accurate CEGAR-based ATPG in presence of unknown values for large industrial designs.K. Scheibler, D. Erb, and B. Becker. DATE, page 972-977. IEEE, (2016)Accurate Diagnosis of Interconnect Open Defects Based on the Robust Enhanced Aggressor Victim Model.P. Raiola, D. Erb, S. Reddy, and B. Becker. VLSI Design, page 135-140. IEEE Computer Society, (2017)Accurate Multi-cycle ATPG in Presence of X-Values.D. Erb, M. Kochte, M. Sauer, H. Wunderlich, and B. Becker. Asian Test Symposium, page 245-250. IEEE Computer Society, (2013)Test pattern generation in presence of unknown values based on restricted symbolic logic.D. Erb, K. Scheibler, M. Kochte, M. Sauer, H. Wunderlich, and B. Becker. ITC, page 1-10. IEEE Computer Society, (2014)