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A Hybrid Design Automation Tool for SAR ADCs in IoT.

M. Ding, P. Harpe, G. Chen, B. Busze, Y. Liu, C. Bachmann, K. Philips, and A. van Roermund. IEEE Trans. VLSI Syst., 26 (12): 2853-2862 (2018)

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Prof. Dr. Pieter Anne Vermeer University of Stuttgart

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A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction.P. Harpe, E. Cantatore, and A. van Roermund. ISSCC, page 270-271. IEEE, (2013)A 30fJ/conversion-step 8b 0-to-10MS/s asynchronous SAR ADC in 90nm CMOS.P. Harpe, C. Zhou, X. Wang, G. Dolmans, and H. de Groot. ISSCC, page 388-389. IEEE, (2010)Power Optimization for Pipelined ADCs with Open-Loop Residue Amplifiers.A. Zanikopoulos, P. Harpe, H. Hegt, and A. van Roermund. ICECS, page 132-135. IEEE, (2006)A low power configurable bio-impedance spectroscopy (BIS) ASIC with simultaneous ECG and respiration recording functionality.J. Xu, P. Harpe, J. Pettine, C. Hoof, and R. Yazicioglu. ESSCIRC, page 396-399. IEEE, (2015)A 430nW 64nV/vHz current-reuse telescopic amplifier for neural recording applications.S. Song, M. Rooijakkers, P. Harpe, C. Rabotti, M. Mischi, A. van Roermund, and E. Cantatore. BioCAS, page 322-325. IEEE, (2013)A680 μW Burst-Chirp UWB Radar Transceiver for Vital Signs and Occupancy Sensing up to 15m Distance.Y. Liu, S. Sheelavant, M. Mercuri, P. Mateman, J. Dijkhuis, A. Zomagboguelou, A. Breeschoten, S. Traferro, Y. Zhang, T. Torfs and 3 other author(s). ISSCC, page 166-168. IEEE, (2019)A 0.6V 54DB SNR Analog Frontend with 0.18% THD for Low Power Sensory Applications in 65NM CMOS.K. Badami, K. Murthy, P. Harpe, and M. Verhelst. VLSI Circuits, page 241-242. IEEE, (2018)A Hybrid Design Automation Tool for SAR ADCs in IoT.M. Ding, P. Harpe, G. Chen, B. Busze, Y. Liu, C. Bachmann, K. Philips, and A. van Roermund. IEEE Trans. VLSI Syst., 26 (12): 2853-2862 (2018)26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme.M. Ding, P. Harpe, Y. Liu, B. Busze, K. Philips, and H. de Groot. ISSCC, page 1-3. IEEE, (2015)Digital post-correction of front-end track-and-hold circuits in ADCs.P. Harpe, A. Zanikopoulos, H. Hegt, and A. van Roermund. ISCAS, IEEE, (2006)

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A Hybrid Design Automation Tool for SAR ADCs in IoT.

Please choose a person to relate this publication to

Prof. Dr. Pieter Anne Vermeer University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Harpe, Pieter"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Hybrid Design Automation Tool for SAR ADCs in IoT.

Please choose a person to relate this publication to

Prof. Dr. Pieter Anne Vermeer University of Stuttgart

Other publications of authors with the same name

Disambiguation

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Chicago
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A Hybrid Design Automation Tool for SAR ADCs in IoT.