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HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation.

, , , , and . IEEE Trans. Computers, 67 (11): 1637-1650 (2018)

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Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves., , , and . DSD, page 545-552. IEEE Computer Society, (2018)Secure remote reconfiguration of FPGAs., , , , , and . Dynamically Reconfigurable Architectures, volume 10281 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2010)Secure, Remote, Dynamic Reconfiguration of FPGAs., , and . TRETS, 7 (4): 35:1-35:19 (2015)Balancing elliptic curve coprocessors from bottom to top., , , and . Microprocessors and Microsystems - Embedded Hardware Design, (2019)SACHa: Self-Attestation of Configurable Hardware., , , and . DATE, page 746-751. IEEE, (2019)PRNGs for Masking Applications and Their Mapping to Evolvable Hardware., , , , , , and . CARDIS, volume 10146 of Lecture Notes in Computer Science, page 209-227. Springer, (2016)Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs., , , , and . J. Cryptographic Engineering, 5 (2): 113-122 (2015)SHeLA: Scalable Heterogeneous Layered Attestation., , , , and . IEEE Internet of Things Journal, 6 (6): 10240-10250 (2019)Remote FPGA design through eDiViDe - European Digital Virtual Design Lab., , , , , , , , , and 2 other author(s). FPL, page 1. IEEE, (2013)Hardware Strengthening a Distributed Logging Scheme., , , and . DSD, page 171-176. IEEE Computer Society, (2012)