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The clock constraint specification language for building timed causality models - Application to synchronous data flow graphs.

, , , and . ISSE, 6 (1-2): 99-106 (2010)

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Dealing with AADL End-to-End Flow Latency with UML MARTE., , and . ICECCS, page 228-233. IEEE Computer Society, (2008)A multiform time approach to real-time system modeling; Application to an automotive system., , and . SIES, page 234-241. IEEE, (2007)Formal Specification of Hybrid MARTE Statecharts., , , , and . TASE, page 59-66. IEEE Computer Society, (2012)TimeSquare: Treat Your Models with Logical Time., and . TOOLS (50), volume 7304 of Lecture Notes in Computer Science, page 34-41. Springer, (2012)The Time Model of Logical Clocks Available in the OMG MARTE Profile., , , and . Synthesis of Embedded Software, Springer, (2010)Meta-models Combination for Reusing Verification Techniques., , and . MODELSWARD, page 37-48. SciTePress, (2019)xSHS: An Executable Domain-Specific Modeling Language for Modeling Stochastic and Hybrid Behaviors of Cyber-Physical Systems., , , and . APSEC, page 683-687. IEEE, (2018)Work-in-Progress: From Logical Time Scheduling to Real-Time Scheduling., and . RTSS, page 143-146. IEEE Computer Society, (2018)MARTE/pCCSL: Modeling and Refining Stochastic Behaviors of CPSs with Probabilistic Logical Clocks., , , , and . FACS, volume 10231 of Lecture Notes in Computer Science, page 111-133. (2016)A Model-Driven Based Environment for Automatic Model Coordination., , , and . P&D@MoDELS, volume 1554 of CEUR Workshop Proceedings, page 44-47. CEUR-WS.org, (2015)