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Managing Leakage Energy in Cache Hierarchies., , , , , , and . J. Instruction-Level Parallelism, (2003)Using Memory Compression for Energy Reduction in an Embedded Java System., , , , and . Journal of Circuits, Systems, and Computers, 11 (5): 537-556 (2002)Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations., , and . IEEE Trans. Computers, 54 (6): 714-726 (2005)Reliability-Aware SOC Voltage Islands Partition and Floorplan., , , and . ISVLSI, page 343-348. IEEE Computer Society, (2006)Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach., , , , and . DATE, page 64-69. IEEE Computer Society, (2005)On the Effects of Process Variation in Network-on-Chip Architectures., , , , , , and . IEEE Trans. Dependable Sec. Comput., 7 (3): 240-254 (2010)On the Detection of Clones in Sensor Networks Using Random Key Predistribution., , , , and . IEEE Trans. Systems, Man, and Cybernetics, Part C, 37 (6): 1246-1258 (2007)A clock power model to evaluate impact of architectural and technology optimizations., , and . IEEE Trans. VLSI Syst., 10 (6): 844-855 (2002)Design considerations for databus charge recovery., , , and . IEEE Trans. VLSI Syst., 9 (1): 104-106 (2001)A compiler-based approach for dynamically managing scratch-pad memories in embedded systems., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (2): 243-260 (2004)