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Disambiguation of "Bhattacharyya, Shuvra S."

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Low power design methodology for signal processing systems using lightweight dataflow techniques.

, , , , , , , , and . DASIP, page 82-89. IEEE, (2016)

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Arnab Bhattacharyya University of Stuttgart

S. Schumann

S. Seemann

S. Wartzack

Boettinger S

 

Other publications of authors with the same name

Exploiting Statically Schedulable Regions in Dataflow Programs., , , and . Signal Processing Systems, 63 (1): 129-142 (2011)Parameterized Scheduling of Topological Patterns in Signal Processing Dataflow Graphs., , , and . Signal Processing Systems, 71 (3): 275-286 (2013)Guest Editorial., , and . VLSI Signal Processing, 40 (1): 5-6 (2005)Synthesis of Embedded Software from Synchronous Dataflow Specifications., , and . VLSI Signal Processing, 21 (2): 151-166 (1999)Memory-constrained Block Processing for DSP Software Optimization., , and . Signal Processing Systems, 50 (2): 163-177 (2008)Multidimensional Exploration of Software Implementations for DSP Algorithms., , and . VLSI Signal Processing, 24 (1): 83-98 (2000)Instrumentation-driven framework for validation of dataflow applications., and . SiPS, page 1-6. IEEE, (2014)Methods for Efficient Implementation of Model Predictive Control on Multiprocessor Systems., , and . CCA, page 1357-1362. IEEE, (2010)Dynamic configuration of dataflow graph topology for DSP system design video encoder example., and . ICASSP (5), page 69-72. IEEE, (2005)Contention-Conscious Transaction Ordering in Embedded Multiprocessors., and . ASAP, page 276-. IEEE Computer Society, (2000)