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Disambiguation of "Bhattacharyya, Shuvra S."

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Memory-constrained Block Processing for DSP Software Optimization.

, , and . Signal Processing Systems, 50 (2): 163-177 (2008)

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Arnab Bhattacharyya University of Stuttgart

S. Schumann

S. Seemann

S. Wartzack

Boettinger S

 

Other publications of authors with the same name

Interface-based hierarchy for synchronous data-flow graphs., , and . SiPS, page 145-150. IEEE, (2009)Multidimensional Dataflow Graph Modeling and Mapping for Efficient GPU Implementation., , , , and . SiPS, page 300-305. IEEE, (2012)Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations., , , and . SiPS, page 475-480. IEEE, (2007)Parameterized core functional dataflow graphs and their application to design and implementation of wireless communication systems., , and . SiPS, page 1-6. IEEE, (2013)Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System., , , , , , and . ICPP Workshops, page 66-73. IEEE Computer Society, (2006)Joint Minimization of Code and Data for Synchronous Dataflow Programs., , and . Formal Methods in System Design, 11 (1): 41-70 (1997)Instrumentation-driven model detection for dataflow graphs., , and . ISSoC, page 1-8. IEEE, (2012)Real-Time Logic Verification of a Wireless Sensor Network., , and . CSIE (3), page 269-273. IEEE Computer Society, (2009)Just-in-time scheduling techniques for multicore signal processing systems., , , , , and . GlobalSIP, page 25-29. IEEE, (2014)Systematic generation of FPGA-based FFT implementations., , , and . ICASSP, page 1413-1416. IEEE, (2008)