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Disambiguation of "Yamawaki, Akira"

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An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware.

, , and . ERSA, page 233-239. CSREA Press, (2009)

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Other publications of authors with the same name

A Programmable Load/Store Unit on C-based Hardware Design for FPGA., and . FPT, page 361-364. IEEE, (2007)An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware., , and . ERSA, page 233-239. CSREA Press, (2009)Worst-Case Performance of ILIFC with Inversion Cells., , and . IEICE Transactions, 100-A (12): 2662-2670 (2017)An Efficient Hardware Architecture from C Program with Memory Access to Hardware., , and . ICCSA (2), volume 6017 of Lecture Notes in Computer Science, page 488-502. Springer, (2010)An Upper Bound on the Generalized Cayley Distance., , and . ISITA, page 600-604. IEEE, (2018)Construction of Unrestricted Rate Parallel Random Input Output Code., , , and . CoRR, (2017)Omnidirectional Background Scrolling in High-Level Synthesis Oriented Game Programing Library., and . TENCON, page 140-144. IEEE, (2021)Tagged communication and synchronization memory for multiprocessor-on-a-chip., , and . Systems and Computers in Japan, 32 (4): 1-13 (2001)Evaluation of mechanisms introduced to improve performance of TSVM cache., and . Parallel and Distributed Computing and Networks, page 502-507. IASTED/ACTA Press, (2004)Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor., and . ISPAN, page 324-333. IEEE Computer Society, (2005)