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Design and Implementation of aWorkload Specific Simulator.

, , and . Annual Simulation Symposium, page 230-243. IEEE Computer Society, (2006)

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An Accurate and Efficient Time-Division Parallelization of Cycle Accurate Architectural Simulators., , , and . Annual Simulation Symposium, page 247-255. IEEE Computer Society, (2007)D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory., , , , , , , , and . DATE, page 1813-1818. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A Minimal Roll-Back Based Recovery Scheme for Fault Toleration in Pipeline Processors., , , , , and . PRDC, page 237-238. IEEE Computer Society, (2010)An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation., , , , , and . IEICE Transactions, 100-D (10): 2493-2504 (2017)Design and Implementation of aWorkload Specific Simulator., , and . Annual Simulation Symposium, page 230-243. IEEE Computer Society, (2006)A Tightly Coupled General Purpose Reconfigurable Accelerator LAPP and Its Power States for HotSpot-Based Energy Reduction., , , , and . IEICE Transactions, 97-D (12): 3092-3100 (2014)Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks., , , , , and . DSDIS, page 675-681. IEEE, (2015)A programmable analog calculation unit for vector computations., , , and . COOL CHIPS, page 1-3. IEEE Computer Society, (2018)An Instruction Decomposition Method for Reconfigurable Decoders., , and . IWIA, page 39-47. IEEE, (2010)Design and Implementation of a High Speed Microprocessor Simulator BurstScalar., and . MASCOTS, page 364-372. IEEE Computer Society, (2004)