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Disambiguation of "Hayashikoshi, Masanori"

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Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks.

, , , , , and . DSDIS, page 675-681. IEEE, (2015)

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Other publications of authors with the same name

Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications., , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation., , , , , and . IEICE Transactions, 100-D (10): 2493-2504 (2017)Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks., , , , , and . DSDIS, page 675-681. IEEE, (2015)A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications., , , , , , , , , and . IEICE Transactions, 102-C (4): 287-295 (2019)Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications., , , , , , , and . IEEE Trans. Multi-Scale Computing Systems, 4 (4): 784-792 (2018)A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter., , , , , , and . ITC, page 615-622. IEEE Computer Society, (1992)Data-aware power management for periodic real-time systems with non-volatile memory., , , , , , , , and . NVMSA, page 1-6. IEEE, (2014)An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis., , , , , and . VLSI-SoC, page 1-7. IEEE, (2016)Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters., , , , , , and . IEEE Design & Test of Computers, 10 (2): 6-12 (1993)Normally-off MCU architecture for low-power sensor node., , , , and . ASP-DAC, page 12-16. IEEE, (2014)