Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.

H. Zhuo, Y. Li, W. Rhee, and Z. Wang. VLSI-DAT, page 1-4. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

The design and implementation of a chipset for the endoscopic Micro-Ball.Y. Gu, G. Li, X. Xie, T. Sun, S. Liu, X. Li, S. Mai, and Z. Wang. ISCAS, page 2633-2636. IEEE, (2012)A pulse-shaped power amplifier with dynamic bias switching for IR-UWB transmitters.S. Geng, W. Rhee, and Z. Wang. ISCAS, page 2529-2532. IEEE, (2012)A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS.S. Hu, C. Jia, K. Huang, C. Zhang, X. Zheng, and Z. Wang. ISCAS, page 309-312. IEEE, (2012)A high-voltage, energy-efficient, 4-electrode output stage for implantable neural stimulator.J. Liu, S. Mai, C. Zhang, and Z. Wang. ISCAS, page 762-765. IEEE, (2015)Applying "digital landslide technique" to survey large scale Tian-Tai-Xiaong landslide in Sichuan Province China.Z. Wang. IGARSS, page 1818-1821. IEEE, (2005)An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS.N. Qi, B. Chi, Y. Xu, Z. Chen, J. Xie, Y. Xu, Z. Song, and Z. Wang. CICC, page 1-4. IEEE, (2013)A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.H. Zhuo, Y. Li, W. Rhee, and Z. Wang. VLSI-DAT, page 1-4. IEEE, (2014)An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOS.H. Jia, B. Chi, and Z. Wang. ESSCIRC, page 124-127. IEEE, (2015)Design Practice of Power-oriented Integrated Circuits for Biomedical Implant Systems.Z. Wang, S. Mai, C. Zhang, and H. Chen. ICECS, page 78-81. IEEE, (2007)Modeling and simulation to the design of SigmaDelta fractional-N frequency synthesizer.S. Huang, H. Ma, and Z. Wang. DATE, page 291-296. EDA Consortium, San Jose, CA, USA, (2007)

PUMA

Disambiguation of "Wang, Zhihua"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.

Please choose a person to relate this publication to

Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Wang, Zhihua"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.

Please choose a person to relate this publication to

Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.