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Towards a performance-portable description of geometric multigrid algorithms using a domain-specific language., , , , , , and . J. Parallel Distrib. Comput., 74 (12): 3191-3201 (2014)Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach., , , , and . ACM Trans. Embedded Comput. Syst., 13 (4s): 133:1-133:29 (2014)FPGA-based accelerator design from a domain-specific language., , , and . FPL, page 1-9. IEEE, (2016)HIPAcc., , , and . FPGAs for Software Programmers, Springer, (2016)HIPAcc: A Domain-Specific Language and Compiler for Image Processing., , , , , and . IEEE Trans. Parallel Distrib. Syst., 27 (1): 210-224 (2016)Code generation from a domain-specific language for C-based HLS of hardware accelerators., , , , and . CODES+ISSS, page 17:1-17:10. ACM, (2014)Automatic Kernel Fusion for Image Processing DSLs., , , and . SCOPES, page 76-85. ACM, (2018)Hybrid code description for developing fast and resource efficient image processing architectures., , , , , , and . SAMOS, page 211-218. IEEE, (2016)Code generation for embedded heterogeneous architectures on android., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Loop Parallelization Techniques for FPGA Accelerator Synthesis., , , , and . Signal Processing Systems, 90 (1): 3-27 (2018)