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An efficient sub-sample interpolator hardware for VP9-10 standards.

G. Paim, W. Penny, J. Goebel, V. Afonso, A. Susin, M. Porto, B. Zatt, and L. Agostini. ICIP, page 2167-2171. IEEE, (2016)

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High Throughput Multiplierless Architecture for VP9 Fractional Motion Estimation.J. Goebel, L. Agostini, L. Agostini, B. Zatt, and M. Porto. SBCCI, page 1-6. IEEE, (2018)A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra Predictor.M. Corrêa, B. Waskow, J. Goebel, D. Palomino, G. Corrêa, and L. Agostini. LASCAS, page 93-96. IEEE, (2019)Low-power hardware design for the HEVC Binary Arithmetic Encoder targeting 8K videos.F. Ramos, J. Goebel, B. Zatt, M. Porto, and S. Bampi. SBCCI, page 1-6. IEEE, (2016)An efficient sub-sample interpolator hardware for VP9-10 standards.G. Paim, W. Penny, J. Goebel, V. Afonso, A. Susin, M. Porto, B. Zatt, and L. Agostini. ICIP, page 2167-2171. IEEE, (2016)Objective and Subjective Video Quality Assessment in Mobile Devices for Low-Complexity H.264/AVC Codecs.M. Melo, J. Goebel, D. Farias, C. Santos, T. Tavares, G. Corrêa, B. Zatt, and M. Porto. WebMedia, page 429-432. ACM, (2017)An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs.J. Goebel, G. Paim, L. Agostini, B. Zatt, and M. Porto. ISCAS, page 2202-2205. IEEE, (2016)High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator.W. Penny, J. Goebel, G. Paim, M. Porto, L. Agostini, and B. Zatt. J. Real-Time Image Processing, 16 (1): 175-192 (2019)High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards.G. Paim, J. Goebel, W. Penny, B. Zatt, M. Porto, and L. Agostini. ICIP, page 2162-2166. IEEE, (2016)High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation.R. Domanski, J. Goebel, W. Penny, M. Porto, D. Palomino, B. Zatt, and L. Agostini. IEEE Trans. on Circuits and Systems, 66-II (5): 883-887 (2019)ASIC power-estimation accuracy evaluation: A case study using video-coding architectures.M. Perleberg, J. Goebel, M. Melo, V. Afonso, L. Agostini, B. Zatt, and M. Porto. LASCAS, page 1-4. IEEE, (2018)

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An efficient sub-sample interpolator hardware for VP9-10 standards.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An efficient sub-sample interpolator hardware for VP9-10 standards.

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An efficient sub-sample interpolator hardware for VP9-10 standards.