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Thermal Sensing Using Micro-ring Resonators in Optical Network-on-Chip.

, , , , , , and . DATE, page 1611-1614. IEEE, (2019)

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Efficient SAT-Based Mapping and Scheduling of Homogeneous Synchronous Dataflow Graphs for Throughput Optimization., , , , and . RTSS, page 492-504. IEEE Computer Society, (2008)Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip., , , , , , , and . ISVLSI, page 254-259. IEEE Computer Society, (2011)Enhancing lifetime of NVM-based main memory with bit shifting and flipping., , , , , , and . RTCSA, page 1-7. IEEE Computer Society, (2014)Efficient Software Synthesis for Dynamic Single Appearance Scheduling of Synchronous Dataflow., , and . Embedded Systems Letters, 1 (3): 69-72 (2009)Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip., , , , , , , and . HPCC/CSS/ICESS, page 571-576. IEEE, (2015)Analyzing Data Cache Related Preemption Delay With Multiple Preemptions., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 37 (11): 2255-2265 (2018)An Efficient Technique of Application Mapping and Scheduling on Real-Time Multiprocessor Systems for Throughput Optimization., and . ACM Trans. Embedded Comput. Syst., 15 (4): 65:1-65:25 (2016)Timing-Anomaly Free Dynamic Scheduling of Conditional DAG Tasks on Multi-Core Systems., , , , and . ACM Trans. Embedded Comput. Syst., 18 (5s): 91:1-91:19 (2019)TaiJiNet: Towards Partial Binarized Convolutional Neural Network for Embedded Systems., , , , , , , , and . ISVLSI, page 136-141. IEEE Computer Society, (2018)Design of a Hierarchical Clos-Benes Optical Network-on-Chip Architecture., , and . ISVLSI, page 523-528. IEEE, (2019)