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A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation.

, , , , , , , , , , , , , and . IEICE Transactions, 97-C (4): 332-341 (2014)

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Session Initiation Protocol (SIP) Usage of the Offer/Answer Model., , and . RFC, (August 2011)A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation., , , , , , , , , and 4 other author(s). IEICE Transactions, 97-C (4): 332-341 (2014)An Extended Direct Power Injection Method for In-Place Susceptibility Characterization of VLSI Circuits Against Electromagnetic Interference., , , , and . IEEE Trans. VLSI Syst., 23 (10): 2347-2351 (2015)A Step Size Control Method Improving Estimation Speed in Double Talk Term., , , , , and . IEICE Transactions, 96-A (7): 1543-1551 (2013)An insertion loss control method for supplementing cancellation effect deteriorated by echo path change in hands free telecommunication system., , , , and . APCCAS, page 439-442. IEEE, (2014)A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement., , , , , , , , , and 4 other author(s). ISQED, page 16-23. IEEE, (2014)Character input system based on EMG signals generated by eye blinks., , and . ACIT, page 7:1-7:6. ACM, (2019)Evaluation of SRAM-Core Susceptibility against Power Supply Voltage Variation., , , , , and . IEICE Transactions, 95-C (4): 586-593 (2012)