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Optimization of Data-Flow Computations Using Canonical TED Representation.

, , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (9): 1321-1333 (2009)

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Dr. rer. nat. Daniel Hernandez University of Stuttgart

Visualizing How-Provenance Explanations for SPARQL Queries, , , and . Proceedings of the ACM Web Conference 2023, page 212-216. New York, NY, United States, Association for Computing Machinery, (2023)

Univ. -Prof. Dr. Daniel Weiskopf University of Stuttgart

Dataset for NMF-based Analysis of Mobile Eye-Tracking Data, , , and . Dataset, (2024)Related to: Daniel Klötzl, Tim Krake, Frank Heyen, Michael Becher, Maurice Koch, Daniel Weiskopf, and Kuno Kurzhals. 2024. NMF-Based Analysis of Mobile Eye-Tracking Data. In 2024 Symposium on Eye Tracking Research and Applications (ETRA ’24), June 4-7, 2024, Glasgow, United Kingdom. ACM, New York, NY, USA, 9 pages. doi: 10.1145/3649902.3653518.
Dataset for NMF-based Analysis of Mobile Eye-Tracking Data, , , and . Dataset, (2024)Related to: Daniel Klötzl, Tim Krake, Frank Heyen, Michael Becher, Maurice Koch, Daniel Weiskopf, and Kuno Kurzhals. 2024. NMF-Based Analysis of Mobile Eye-Tracking Data. In 2024 Symposium on Eye Tracking Research and Applications (ETRA ’24), June 4-7, 2024, Glasgow, United Kingdom. ACM, New York, NY, USA, 9 pages. doi: 10.1145/3649902.3653518.Visual Analysis System to Explore the Visual Quality of Multidimensional Time Series Projections, and . Software, (2024)Related to: T. Munz-Körner, D. Weiskopf, Exploring visual quality of multidimensional time series projections, Visual Informatics (2024). doi: 10.1016/j.visinf.2024.04.004.Supplemental Materials for STEP: Sequence of Time-Aligned Edge Plots, , , , , and . Software, (2024)Related to: Manuscript still under review.
 

Other publications of authors with the same name

Optimization of Data-Flow Computations Using Canonical TED Representation., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (9): 1321-1333 (2009)Retiming arithmetic datapaths using Timed Taylor Expansion Diagrams., , , and . HLDVT, page 33-39. IEEE Computer Society, (2010)Variable ordering for taylor expansion diagrams., , , , and . HLDVT, page 55-59. IEEE Computer Society, (2004)FPGA latency optimization using system-level transformations and DFG restructuring., , and . DATE, page 1553-1558. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Data-flow transformations using Taylor expansion diagrams., , , , and . DATE, page 455-460. EDA Consortium, San Jose, CA, USA, (2007)Efficient factorization of DSP transforms using taylor expansion diagrams., , , , , and . DATE, page 754-755. European Design and Automation Association, Leuven, Belgium, (2006)Optimizing data flow graphs to minimize hardware implementation., , , , and . DATE, page 117-122. IEEE, (2009)High-Level Dataflow Transformations Using Taylor Expansion Diagrams., , , and . IEEE Design & Test of Computers, 26 (4): 46-57 (2009)